1. Field of the Invention
The present invention relates to a multiplex serial data communication circuit network and method and motor control system and method using the multiplex serial data communication circuit network and method applicable to an automotive vehicle in which a data signal and a clock pulse signal are superposed on each other using a single signal transmission line.
2. Description of the Background Art
It is necessary to provide two circuit lines of a data transmission line and a clock (pulse) transmission line in a case where a synchronous serial transmission is carried out in which a bit synchronization is adopted in accordance with a clock pulse signal. However, since the number of the circuit lines give a large influence on a cost of installing a long distance range of data transmission circuit network or installing an inter multi-station data transmission network, it is desirable to transmit the data signal and clock pulse signal with a single transmission line and it is necessary to adopt such a self-synchronization technique as to extract the clock pulse signal from the data signal and encode or decode the data signal using the extracted clock signal.
One of various techniques of self-synchronization includes a utilization of a Manchester code as shown in FIG. 2.
Although a NRZ (Non-Return to Zero) code shown in FIG. 1 is a simplest and most basic digital code, no level change in a signal when a data of "0" is continued or a data of "1" is continued so that a sufficient clock information is not included in the NRZ code.
On the other hand, the Manchester code is such a code that a rising edge occurs at a center of a bit when the data is "0" and a falling edge occurs at the center of the bit when the data is 1 (refer to FIG. 2).
Consequently, since either of rising or falling edge always occurs at the center of the bit, the clock information is included for every bit.
FIG. 3 shows an example of a clock pulse signal extracting circuit to extract the clock pulse signal from the Manchester code.
FIGS. 4A through 4E show integrally a timing chart of each part denoted by A, B, C, D, and E of FIG. 3.
A data signal A constituted by the Manchester code received from the transmission line is directly input to one of input ends of an Exclusive-OR circuit 1, the other input end thereof receiving a delayed signal (delay signal B) of the data signal A via a delay circuit 2. An output signal from the Exclusive-OR circuit 2 is input to one of two input ends of a AND circuit 3. The other input end of the AND circuit 3 receives a negated (NOTed) output signal D of a mono-stable multivibrator 4.
An output signal E of the AND circuit 3 is extracted as the clock signal component. Then, a negatived (NOTed) input signal of the output signal E is fed back and received by the mono-stable multivibrator 4.
Each signal of A through E corresponds to A through E of FIGS. 4A through 4E.
In operation, when the data signal A of the Manchester code corresponding to the data value shown in FIG. 2 is received by the Exclusive-OR circuit 1, the Exclusive-OR circuit 1 outputs the output signal C having a high level (H) only when either of the data signal A or the delay signal B of the delay circuit 2 is at the high level (H). On the other hand, the mono-stable multivibrator 4 receives the high level signal (H) upon the rising edge of the output signal E of the AND circuit 3 and outputs the output signal having the high level (H) for a constant period of time upon a triggering it by the input high level signal (H). Hence, the other input end of the AND circuit 3 is at the high level (H) while the next triggering occurs after the end of the high level output signal from the mono-stable multivibrator 4 since the output signal of the mono-stable multivibrator 4 is negated (NOTed) and input to the other input end of the AND circuit 3. During the high level state of the other input end of the AND circuit 3, the output signal of the AND circuit 3 is at the high level (H) if the output signal C of the Exclusive-OR circuit 1 is at the high level (H).
Consequently, the clock pulse signal component E shown in FIG. 4E is extracted. Then, the thus achieved clock pulse signal component is further processed and is used to decode the received data.
Although, in the above-described self-synchronization technique, the clock pulse signal component can be extracted for each bit, a generation timing of the clock pulse signal component is different according to the received data signal. Hence, it is not possible for the extracted clock signal component to be used as a timing signal for decoding the data signal.
Consequently, it is necessary to newly provide a time reference generator such as an oscillator in order to generate a timing to determine "0" or "1" of each bit.
In addition, since the extraction of the clock pulse signal is carried out only during the data reception and cannot be used for other operations than the data reception, it is necessary to install an oscillation source to generate the clock information in order to transmit the data. The other processing operations are based on signals derived from the oscillation source.
As described above, in a serial data transmission circuit network in which the above-described self-synchronization technique is adopted, it is necessary to install oscillation sources in respective stations (data generating and receiving stations) constituting the network. Consequently, this introduces an increase in cost of installing the serial data transmission circuit network in a data transmission area such as an automotive vehicle.